High-Level Synthesis and Verification

Catapult High-Level Synthesis

Course Code
290812-KR
Software
High-Level Synthesis and Verification 22.12
Language
한국어
User Level
All
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Live In-Person Duration
3 days

The Catapult HLS C++ Training introduces all the concepts needed to begin designing hardware using Catapult and Untimed C++ HLS. The training begins with an overview of the basics of HLS, details the Catapult Flow, GUI, and Design Analysis Features. It then delves into the C++ modelling style used for HLS, including the use of bit-accurate data types. This is then followed by tool usage and specific features, the concepts of loop unrolling and loop pipelining, and coding for HLS. After covering the basics, the training focuses on coding memory architecture, designing with memories, advanced schedule failure debug, and finishes up with a discussion on multi-process design.

PREREQUISITES

  • Basic understanding of C/C++

PROVIDED COURSE MATERIALS
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Learning Services, EDA Korea

PRIMARY COURSE TOPICS

Throughout this course, extensive hands-on lab exercises provide you with practical experience using Catapult software. Hands-on lab topics include:

  • How HLS Works
  • Catapult Flow and GUI
  • Design Analysis
  • Bit-accurate Data Types
  • Modelling Datapath Interfaces in C++
  • Preparing for Synthesis
  • Automatic C++ to RTL verification
  • Basic Untimed C++ Interface Protocols and Hardware Behavior
  • Loop Unrolling and Coding Style
  • Loop Pipelining
  • Working with Memories and Memory Architecture
  • Schedule Failure Debug
  • Multi-process Design