The Tessent™ Scan and ATPG course will drive the development of your skills and knowledge in scan and ATPG design utilizing the Tessent Scan, Tessent FastScan™, and the Tessent Visualizer tools. The knowledge gained for generating test patterns in this class is directly applicable for generating test patterns for designs utilizing Tessent™ TestKompress™. ModelSim® is used to simulate test patterns to identify potential issues (mismatches) between the expected results from pattern generation and the Verilog simulation results. During this course, you will insert a full scan in a design using Tessent Scan, and create high-quality test patterns using the ATPG tool. You will also learn about ATPG compression techniques including an introduction to Tessent TestKompress.
The hands-on labs are designed to reinforce key concepts through practical experience and to develop proficiency with the Siemens EDA Tessent tool suite under the guidance of industry-expert instructors.