Tessent Scan and ATPG

Course Code
Tessent 2023.1
User Level
Pricing ID
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List Price
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Live Online Duration
6 hours for each day for 5 days

The Tessent™ Scan and ATPG course will drive the development of your skills and knowledge in scan and ATPG design utilizing the Tessent Scan, Tessent FastScan™, and the Tessent Visualizer tools. The knowledge gained for generating test patterns in this class is directly applicable for generating test patterns for designs utilizing Tessent™ TestKompress™. ModelSim® is used to simulate test patterns to identify potential issues (mismatches) between the expected results from pattern generation and the Verilog simulation results. During this course, you will insert a full scan in a design using Tessent Scan, and create high-quality test patterns using the ATPG tool. You will also learn about ATPG compression techniques including an introduction to Tessent TestKompress.

The hands-on labs are designed to reinforce key concepts through practical experience and to develop proficiency with the Siemens EDA Tessent tool suite under the guidance of industry-expert instructors.



  • A basic background in DFT is helpful

Class Package
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Learning Services, EDA Germany


You Will Learn How To

  • Invoke the Tessent Shell environment in order to utilize Tessent Scan, Tessent FastScan, and Tessent TestKompress
  • Setup and analyze designs to prepare for ATPG
  • Perform ATPG to achieve high test coverage with a minimal number of patterns
  • Troubleshoot DRC violations
  • Troubleshoot areas of low test coverage
  • Troubleshoot simulation mismatches