The Tessent Integrated Flow class is a high-level overview of the Tessent Integrated Flow. It is based upon using the Tessent Shell environment to run the Tessent family of tools to implement DFT, for both logic test and MemoryBist, in order to generate the test structures and test patterns necessary to properly test today’s SoCs.
Using the Tessent Shell integrated flow ties the process of inserting the test structures, which provide both controllability and observability of the internal nodes, into a design netlist and generating the patterns into a single environment. The tool has the capability of performing these functions on both flat and hierarchical designs, as well as for RTL and gate-level designs. The hierarchical capability provides an efficient and effective environment for design and development as the test patterns can be created as the hierarchical blocks are completed, then retargeted to the chip level.
There are no prerequisite courses as this course is an overview of the Tessent Shell flow. However, if you have taken other Tessent courses, this course will demonstrate how the different tools work together.