Questa & ModelSim
Mastering Questa
Course Code
277328-KR
Software
Questa & ModelSim 10.7c
Language
한국어
User Level
Advanced
Pricing ID
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Live In-Person Duration
3 days
The Mastering Questa course will teach you the benefits of Questa’s advanced verification environment. Lectures (ODT videos) include advanced functional verification topics such as constrained-random stimulus generation, functional coverage, and SystemVerilog assertions. Additional topics include viewing and debugging SystemVerilog class objects, Direct Programming Interface (DPI), Power-Aware verification, and transactions. You will also learn how to use Questa’s integrated Verification Management technology, comprising of a verification plan, the Unified Coverage Database (UCDB), test tracking capabilities, ranked test results, and generated HTML reports.
PREREQUISITES
Prerequisites
- Familiarity with SystemVerilog class-based objects, constrained random, functional coverage, and assertions
- Familiarity with VHDL and Verilog
PROVIDED COURSE MATERIALS
Class Package
PRIMARY COURSE TOPICS
What You’ll Learn
- Create a Verification Plan
- Debug SystemVerilog Assertions in the GUI
- Create constrained random simulation environments
- Debug conflicting constraints
- Create and save different verification runs in the UCDB
- View cover groups, assertions, and cover directives in the GUI
- Debug SystemVerilog Assertions in the Assertion Thread Viewer (ATV)
- Import a test plan into the Verification Management Test Browser