PRIMARY COURSE TOPICS

What You’ll Learn

• Discuss the motivations and challenges for Multi-Die designs
• Describe 2.5D, 3D, and 5.5D designs
• Discuss relevant IEEE standards
• Illustrate some DFT and design requirements for Multi-Die designs
• Illustrate the structure of 2.5D devices with DFT inserted
• Discuss design compliance with the IEEE 1149.1 standard
• Discuss boundary scan requirements
• Describe BSDL extraction
• Examine logical groups and bonding configurations
• Discuss clocking in internal and external scan modes in 2.5D devices
• Discuss the Multi-Die flow outline for 2.5D devices
• Illustrate die-level DFT and scan insertion at RTL-level and gate-level
• Examine package-level integration and verification
• Illustrate the structure of 3D devices with DFT inserted
• Describe the structure of the Primary Test Access Ports (PTAPs) and the Secondary Test Access Ports (STAPs)
• Illustrate how the PTAPs and the STAPs work together to provide serial test access
• Describe Flexible Parallel Ports (FPPs) and Die Wrapper Registers (DWRs)
• Examine different scan modes in 3D devices and their hierarchy
• Discuss clocking operation in different scan modes in 3D devices
• Discuss the Multi-Die flow outline for 3D devices
• Illustrate core-level and die-level DFT and scan insertion at RTL-level and gate-level
• Examine stack-level integration and verification
• Discuss Known-Good-Die (KGD) wafer probe test
• Describe sacrificial pads, specifically muxed probe pads
• Illustrate the insertion of probe pads in the DFT flow
• Discuss die-to-die testing in 2.5D and 3D devices
• Examine a wrap-up of the Multi-Die designs diagnosis process

Throughout this course, extensive hands-on lab exercises provide you with practical experience using Tessent software. Hands-on lab topics include:

• Detailed implementation of the 2.5D design flow at the die level and package-level.
• Detailed implementation of the 3D design flow at core level, die-level, and stack-level.
• The use of sacrificial probe pads to provide testability.