Tessent
Tessent IJTAG Core Topics

Course Code
304967-US
Software
Tessent 2026.2
Language
English
User Level
All
Pricing ID
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Live Online Duration
6 hours for each day for 3 days

Designing a modern product requires the integration of multiple IP blocks from both in-house and third party sources. The Siemens EDA Tessent™ IJTAG solution delivers comprehensive automation support for implementing the IEEE 1687 standard, providing plug-and-play IP test and instrumentation integration.

The Tessent™ IJTAG Core Topics course drives the development of your skills and knowledge, using the Instrument Connectivity Language (ICL) in order to describe the interfaces and connectivity in your design. It also teaches you how to use the Procedural Description Language (PDL) in order to define operations applied to individual IP blocks. This course teaches you to extract the IJTAG ICL network data from the gate-level or RTL netlist; then uses these extracted networks to retarget PDL commands from the IP boundary to any point within an ICL-described IEEE 1687 Network.

The chip-level PDL commands can be translated to ATE pattern formats (STIL, WGL, and so on).

The hands-on labs are designed to reinforce key concepts through practical experience and to develop proficiency with Tessent IJTAG, and provide the basis for understanding the usage of IJTAG in the Tessent Integrated Flow under the guidance of industry-expert instructors.

The training course covers the basics required for Tessent MemoryBIST, Tessent ATPG with TestKompress, and Tessent SSN.

PREREQUISITES

A basic background in DFT is helpful

PROVIDED COURSE MATERIALS
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PRIMARY COURSE TOPICS

What You’ll Learn

  • Describe the motivation for IEEE 1687.
  • List core aspects and functionality of IEEE 1687:
  • Instrument Connectivity Language (ICL).
  • Procedural Description Language (PDL).
  • Explain how IEEE 1687 extends the use of IEEE 1149.1 and IEEE 1500.
  • Perform ICL Network Extraction and PDL Command Retargeting flows.
  • Describe instruments using ICL and its advanced features to manipulate data in your design (alias, parameter, enumeration table).
  • Use Tessent IJTAG DRC syntax and semantics rules to debug your design using Tessent Visualizer.

Throughout this course, extensive hands-on lab exercises provide you with practical experience using Tessent software. Hands-on lab topics include:

  • Construct the primitive ICL instrument.
  • Connect the component ICL instances to build a top level ICL netlist.
  • Invoke Tessent IJTAG in Tessent Shell.
  • List basic steps in the IJTAG retargeting flow.
  • Use basic commands in order to gain access to an ICL instrument.
  • Create and write out different retargeting command sets.
  • Use advance syntaxes and features of ICL.
  • Explain how to use IJTAG introspection.
  • Write a PDL procedure to gain access to the instrument.
  • Describe tool behavior when creating retargeting PDL commands.
  • Create PDL commands.
  • Create and implement a multi-TAP configuration.
  • Create retargeted PDL commands and verify them.
  • Shift data through the ICL network in order to access the instruments.
  • Do a basic ICL network extraction flow.
  • Extract the network from bottom-up or top-down.
  • Understand how the tool matches the module in the netlist with the available ICL module.
  • Use the extracted ICL network to create retargeting PDL command file.