The Calibre 3DStack course will help you get started on creating 3DIC layouts for visualization and physical verification, and output a compiled 3D layout for downstream analysis tools.
As the ability to significantly reduce semiconductor device features reaches a saturation point, the semiconductor industry looks toward advanced packaging methods to increase device density. Over the last decade, numerous software tools emerged with solutions to enable 3DIC visualization, verification and analysis. This course teaches students how to use Calibre 3DStack to form a 3DIC stack for visualization, as well as a starting point towards 3D physical verification and analysis. Through a simple 3DIC example, students will learn to use the Calibre 3DStack commands to assemble a 3DIC and write Calibre nmDRC code for physical verification. Hands-on lab exercises will reinforce lecture and discussion topics under the guidance of our industry expert instructors.