On-Demand Training - HyperLynx High-Speed PCB
Description
A collection of learning paths that cover High Speed PCB design and analysis methodology using HyperLynx family of tools.
- 12 month subscription
- Access to cloud-based environment for hands-on lab exercises
- Access to new training content added during the subscription period
- Knowledge assessments to measure learning progress
Explore This On-Demand Training
Chapters
learning path
- Learning Path Overview
- Chapter 1 - Impedance and Stackup Design
- Chapter 2 - Reflections
- Chapter 3 - Crosstalk
- Chapter 4 - Differential Pairs
- Chapter 5 - High-Speed Serial Link Channels and Loss
- Chapter 6 - PDN Principles
- High Speed Signal Integrity Principles Exam
High Speed Signal Integrity Principles
The High Speed Signal Integrity Principles course will help you properly manage the effects of high-speed signals on today’s PCB designs.
Ground and Return Path
High Speed Signal Integrity Principles 8 Chapters
The High Speed Signal Integrity Principles course will help you properly manage the effects of high-speed signals on today’s PCB designs.
1 Learning Path Overview 2 Topics
- Learning Path Overview
- Virtual Lab Worsheet
2 Chapter 1 - Impedance and Stackup Design 11 Topics
- Ground and Return Path
- Time Delay and Impedance
- Characterizing Transmission Lines
- Lab: Impedance and Stackup - Exercises: 1-3
- Knowledge Check 1: Impedance and Stackup Design
- Signals on Transmission Lines
- Lab: Impedance and Stackup - Exercises: 4-8
- Eye Diagrams
- Lab: Impedance and Stackup - Exercises: 9-10
- Knowledge Check 2: Impedance and Stackup Design
- Assessment: Impedance and Stackup Design
3 Chapter 2 - Reflections 13 Topics
- Causes of Reflections
- Knowledge Check 1: Reflections
- Noise from Reflections and Terminations
- Point to Point Routing
- Knowledge Check 2: Reflections
- Noise Margins
- Lab 2: Reflections and Terminations - Exercises: 1-3
- Charactersitics of Topologies
- Lab 2: Reflections and Terminations - Exercises: 4-6
- Impedance Discontinuities and Vias
- Lab 2: Reflections and Terminations - Exercises: 7-9
- Knowledge Check 3: Reflections
- Assessment: Reflections
4 Chapter 3 - Crosstalk 6 Topics
- Crosstalk Principles
- Knowledge Check 1: Crosstalk
- Crosstalk Waveforms: Near End and Far End
- Lab 3: Crosstalk
- Knowledge Check 2: Crosstalk
- Assessment: Crosstalk
5 Chapter 4 - Differential Pairs 8 Topics
- Differential and Common Signals
- Differential and Common Impedance
- Knowledge Check 1: Differerntial Pairs
- Mode Conversion
- Terminating Differential and Common Signals
- Lab 4: Differential Pairs
- Knowledge Check 2: Differential Pairs
- Assessment: Differential Pairs
6 Chapter 5 - High-Speed Serial Link Channels and Loss 10 Topics
- Losses, Reflection, Noise, and Mode Conversion
- Skin Depth and Surface Roughness
- Attenuation and Insertion Loss
- Knowledge Check 1: High-Speed Serial Link Channels and Loss
- Lab 5: High-Speed Serial Links and Losses - Exercises: 1-5
- Designing to Minimize Mode Conversion
- 1/4 Wave Stub Resonance
- Lab 5: High-Speed Serial Links and Losses - Exercises: 6-8
- Knowledge Check 2: High-Speed Serial Link Channels and Loss
- Assessment: High-Speed Serial Link Channels and Loss
7 Chapter 6 - PDN Principles 9 Topics
- Power Deliver Network Concepts
- Decoupling
- Knowledge Check 1: PDN Principles
- Controlling PDN Impedance
- Lab 6: Power Distribution Network - Exercises: 1-5
- Vias Through Plane Cavities
- Lab 6: Power Distribution Network - Exercises: 6-8
- Knowledge Check 2: PDN Principles
- Assessment: PDN Principles
8 High Speed Signal Integrity Principles Exam 1 Topic
- Level 1 Exam - High Speed Signal Integrity Principles
Chapters
learning path
- HyperLynx Signal Integrity Analysis Learning Path Overview
- HyperLynx SI Overview
- LineSim User Interface
- Interconnects
- Developing Constraints
- BoardSim User Interface
- Batch Analysis in BoardSim
- Post-Layout Evaluation and Verification
- Exporting PCB Layouts to BoardSim
- Differential Pairs
- MultiBoard Analysis
- Theory, Simulation, and Measurements
- Models
- HyperLynx Signal Integrity Analysis Exam
HyperLynx Signal Integrity Analysis
In this course you will learn how to use HyperLynx to develop design constraints and to detect and correct signal integrity issues in your designs.
Analysis Strategies
HyperLynx Signal Integrity Analysis 14 Chapters
In this course you will learn how to use HyperLynx to develop design constraints and to detect and correct signal integrity issues in your designs.
1 HyperLynx Signal Integrity Analysis Learning Path Overview 1 Topic
- Learning Path Overview
2 HyperLynx SI Overview 12 Topics
- The Roles of HyperLynx
- HyperLynx Quickstart
- Knowledge Check 1: HyperLynx SI Overview
- Generating Design Constraints with LineSim
- Developing Constraints in LineSim – A Solution
- Analysis Strategies
- Knowledge Check 2: HyperLynx SI Overview
- HyperLynx SI Basics
- Knowledge Check 3: HyperLynx SI Overview
- HyperLynx User Interface
- Knowledge Check 4: HyperLynx SI Overview
- Assessment: HyperLynx SI Overview
3 LineSim User Interface 22 Topics
- Creating LineSim Schematics
- LineSim Graphical User Interface
- Placing and Connecting Symbols
- Knowledge Check 1: LineSim User Interface
- Setting Up Model Libraries
- Assigning Models
- Knowledge Check 2: LineSim User Interface
- Assigning Models
- Assigning Series Passive Models
- IC Component Models
- Knowledge Check 3: LineSim User Interface
- Stackup Manager
- Stackup Editor
- Stackup Advanced Considerations
- Editing Stackups
- Knowledge Check 4: LineSim User Interface
- Digital Oscilloscope: Running Simulations
- Digital Oscilloscope - Making Measurements
- Knowledge Check 5: LineSim User Interface
- SI Simulation with EZwave
- Knowledge Check 6: LineSim User Interface
- Assessment: LineSim User Interface
4 Interconnects 14 Topics
- Lossless Transmission Lines
- Knowledge Check 1: Transmission Lines
- Uncoupled Transmission Lines in LineSim
- Knowledge Check 2: Transmission Lines
- Coupled Transmission Lines
- Coupled Transmission Lines - Advanced Techniques
- Configuring Coupled Transmission Lines
- Knowledge Check 3: Transmission Lines
- Reference Conductors
- Vias and Padstacks
- Vias: Simulating Via Configurations
- Packaging
- Knowledge Check 4: Transmission Lines
- Assessment: Transmission Lines
5 Developing Constraints 20 Topics
- Developing Constraints with LineSim
- Knowledge Check 1: Developing Constraints
- Technology
- Knowledge Check 2: Developing Constraints
- Topology
- Knowledge Check 3: Developing Constraints
- Termination
- Terminator Wizard
- Knowledge Check 4: Developing Constraints
- Transmission Line Parameters
- Investigating Trace Parameters
- Knowledge Check 5: Developing Constraints
- Exploring the Solution Space
- Parametric Sweeps
- Solution Space Exploration
- Constraints
- Performing a Termination Study
- Pre-layout Flow
- Knowledge Check 6: Developing Constraints
- Assessment: Developing Constraints
6 BoardSim User Interface 11 Topics
- Opening & Saving BoardSim Files
- Working with Nets in BoardSim
- Viewing Objects in BoardSim
- Viewing Objects and Working with Nets in BoardSim
- Knowledge Check 1: BoardSim User Interface
- Assigning Models Using .REF & .QPL Files
- Assiging Models Using .REF and .QPL Files
- BoardSim Interactive Oscilloscope
- BoardSim Interactive Crosstalk
- Knowledge Check 2: BoardSim User Interface
- Assessment: BoardSim User Interface
7 Batch Analysis in BoardSim 15 Topics
- Analysis Wizards In Board Sim
- Setting Up Quick Batch Analysis
- Knowledge Check 1: Quick Batch Analysis
- Examining Quick Batch Reports
- Quick Batch Analysis
- Detailed Batch Analysis Setup
- Knowledge Check 2: Quick Batch Analysis
- Crosstalk Related Settings
- Knowledge Check 3: Quick Batch Analysis
- Examining Detailed Batch Analysis Results
- Interpreting Delay and Overshoot Results
- Knowledge Check 4: Quick Batch Analysis
- Detailed Batch Analysis
- Knowledge Check 5: Quick Batch Analysis
- Assessment: Quick Batch Analysis
8 Post-Layout Evaluation and Verification 11 Topics
- HyperLynx Si Example Flow
- Solving Post Layout SI Problems
- Knowledge Check 1: Post-Layout Evaluation and Verification
- Solving Post Layout Problems Through Routing Changes
- Solving Post Layout Problems Using Quick Terminators
- Solving SI Problems Using Quick Terminators
- Knowledge Check 2: Post-Layout Evaluation and Verification
- Solving Post Layout Problems Using Export to LineSim
- Solving SI Problems Using Export to LineSim
- Knowledge Check 3: Post-Layout Evaluation and Verification
- Assessment: Post-Layout Evaluation and Verification
9 Exporting PCB Layouts to BoardSim 5 Topics
- Preparing a Layout for BoardSim
- Knowledge Check 1: Exporting PCB Layouts to BoardSim
- Exporting a Layout to BoardSim
- Knowledge Check 2: Exporting PCB Layouts to BoardSim
- Assessment: Exporting PCB Layouts to BoardSim
10 Differential Pairs 13 Topics
- Overview of Differential Pairs
- Differential Pair Setup in BoardSim
- Exploring Differential Pairs in BoardSim
- Differential Pairs in BoardSim
- Knowledge Check 1: Differential Pairs
- Exploring Differential Pairs in LineSim
- Exporting Differential Pairs to LineSim
- Differential Pair Impedance Planning
- Knowledge Check 2: Differential Pairs
- Configuring Driver Stimulus
- Differential Pairs in LineSim
- Knowledge Check 3: Differential Pairs
- Assessment: Differential Pairs
11 MultiBoard Analysis 14 Topics
- MultiBoard Analysis Introduction
- Knowledge Check 1: MultiBoard Analysis
- Creating MultiBoard Projects
- Knowledge Check 2: MultiBoard Analysis
- Analyzing MultiBoard Projects
- Knowledge Check 3: MultiBoard Analysis
- Configuring Advanced Connectors in MultiBoard Projects
- Simulating Advanced Connectors
- Knowledge Check 4: MultiBoard Analysis
- MultiBoard Analysis
- Fixing SI and Crosstalk Problems
- Working with Rigid-Flex Designs
- Knowledge Check 5: MultiBoard Analysis
- Assessment: MultiBoard Analysis
12 Theory, Simulation, and Measurements 17 Topics
- Overview of High Speed Design Considerations
- Knowledge Check 1: Theory, Simulation, and Measurements
- Overshoot and Ringing
- Reflections
- Knowledge Check 2: Theory, Simulation, and Measurements
- Measuring Overshoot
- Simulating and Measuring Overshoot
- Knowledge Check 3: Theory, Simulation, and Measurements
- Timing Concepts
- Timing Measurements
- Timing Measurements
- Knowledge Check 4: Theory, Simulation, and Measurements
- Crosstalk Concepts
- Simulating Crosstalk
- EMI and HyperLynx DRC
- Knowledge Check 5: Theory, Simulation, and Measurements
- Assessment: Theory, Simulation, and Measurements
13 Models 15 Topics
- Modeling ICs
- Knowledge Check 1: Models
- Testing IC Models
- IBIS Package Wrapper
- Knowledge Check 2: Models
- S-Parameter Models
- Using S-Parameter Models
- SPICE Models
- Knowledge Check 3: Models
- Modeling Connectors and Packages
- Modeling Passive Devices
- Modeling Network Packs
- Modeling Vias
- Knowledge Check 4: Models
- Assessment: Models
14 HyperLynx Signal Integrity Analysis Exam 1 Topic
- Level 1 Exam - HyperLynx Signal Integrity Analysis
Chapters
learning path
- Matching the HyperLynx Stackup with Vendor Datasheets
- Crosstalk Effects in Time and Frequency Domains
- Choosing the Right Termination
- Managing Return Path Discontinuity at Signal Vias
- Designing Differential Vias on High-Speed Channels to Maximize Performance
- Identifying and Reducing Mode Conversion
Practical HyperLynx Methodology
In this methodology-based learning path you will learn how to use HyperLynx to identify, analyze and solve design problems for optimum results.
Matching the HyperLynx Stackup with Vendor Datasheets
Practical HyperLynx Methodology 6 Chapters
In this methodology-based learning path you will learn how to use HyperLynx to identify, analyze and solve design problems for optimum results.
1 Matching the HyperLynx Stackup with Vendor Datasheets 5 Topics
- Matching the HyperLynx Stackup with Vendor Datasheets
- Knowledge Check 1:Matching the HyperLynx Stackup with Vendor Datasheets
- Factors Affecting Impedance for Single Ended and Differential Pairs
- Knowledge Check 2:Matching the HyperLynx Stackup with Vendor Datasheets
- Assessment:Matching the HyperLynx Stackup with Vendor Datasheets
2 Crosstalk Effects in Time and Frequency Domains 7 Topics
- Crosstalk Effects in the Time Domain
- Knowledge Check 1: Crosstalk Effects in Time and Frequency Domains
- Coupling Effects in the Frequency Domain
- Knowledge Check 2: Crosstalk Effects in Time and Frequency Domains
- Common and Differential Crosstalk in the Frequency Domain
- Knowledge Check 3: Crosstalk Effects in Time and Frequency Domains
- Assessment: Crosstalk Effects in Time and Frequency Domains
3 Choosing the Right Termination 5 Topics
- Fly-by Termination
- Knowledge Check 1: Choosing the Right Termination
- Source Series Termination Method
- Knowledge Check 2: Choosing the Right Termination
- Assessment Choosing the Right Termination
4 Managing Return Path Discontinuity at Signal Vias 7 Topics
- Impact of Unmanaged Return Path Discontinuity
- Knowledge Check 1: Managing Return Path Discontinuity at Signal Vias
- Reducing Return Path Discontinuity for Planes at Same DC Voltage
- Knowledge Check 2: Managing Return Path Discontinuity at Signal Vias
- Reducing Return Path Discontunity for Planes of Different DC Voltages
- Knowledge Check 3: Managing Return Path Discontinuity at Signal Vias
- Assessment: Managing Return Path Discontinuity at Signal Vias
5 Designing Differential Vias on High-Speed Channels to Maximize Performance 7 Topics
- Factors Affecting the Performance of a Differential Via
- Knowledge Check 1: Designing Differential Vias on High-speed Channels to Maximize Performance
- Determining the Maximum Via Stub Length
- Knowledge Check 2: Designing Differential Vias on High-speed Channels to Maximize Performance
- Optimizing Impedance of a Differential Via
- Knowledge Check 3: Designing Differential Vias on High-speed Channels to Maximize Performance
- Assessment: Designing Differential Vias on High-speed Channels to Maximize Performance
6 Identifying and Reducing Mode Conversion 7 Topics
- Understanding Mode Conversion on Differential Pairs
- Knowledge Check 1: Identifying and Reducing Mode Conversion
- Mode Conversion Due to Skewed Buffer Model
- Knowledge Check 2: Identifying and Reducing Mode Conversion
- Mode Conversion Due to Asymmetric Interconnect
- Knowledge Check 3: Identifying and Reducing Mode Conversion
- Assessment: Identifying and Reducing Mode Conversion
Chapters
learning path
- HyperLynx DRC Learning Path Overview
- Introduction to HyperLynx DRC
- HyperLynx DRC User Interface
- Running HyperLynx DRC
- HyperLynx DRC Environment
- HyperLynx DRC Exam
HyperLynx DRC
Learn how to use HyperLynx DRC to analyze PCB designs to detect and correct EMI, SI, and power problems in designs.
Overview of HyperLynx DRC
HyperLynx DRC 6 Chapters
Learn how to use HyperLynx DRC to analyze PCB designs to detect and correct EMI, SI, and power problems in designs.
1 HyperLynx DRC Learning Path Overview 1 Topic
- Learning Path Overview
2 Introduction to HyperLynx DRC 8 Topics
- Overview of HyperLynx DRC
- HyperLynx DRC in the Design Flow
- Knowledge Check 1: Introduction to HyperLynx DRC
- HyperLynx DRC Methodology
- Exporting PCB Data for HyperLynx DRC
- Lab: Design Export
- Knowledge Check 2: Introduction to HyperLynx DRC
- Assessment: Introduction to HyperLynx DRC
3 HyperLynx DRC User Interface 8 Topics
- Graphical User Interface
- Project Explorer and Properties
- Knowledge Check 1: HyperLynx DRC User Interface
- Multi-Use Window
- Board Viewer
- Lab: User Interface
- Knowledge Check 2: HyperLynx DRC User Interface
- Assessment: HyperLynx DRC User Interface
4 Running HyperLynx DRC 13 Topics
- Verification Flow
- Project Data, Object Types, and Properties
- Object Lists
- Creating and Configuring Object Lists
- Knowledge Check 1: Running HyperLynx DRC
- Built-in Rules
- Knowledge Check 2: Running HyperLynx DRC
- Running Rules in HyperLynx DRC
- Results, Reports, and ShareLists
- Knowledge Check 3: Running HyperLynx DRC
- Lab: Running HyperLynx DRC
- Knowledge Check 4: Running HyperLynx DRC
- Assessment: Running HyperLynx DRC
5 HyperLynx DRC Environment 13 Topics
- The Options Menu
- HyperLynx DRC Wizard
- Locking Settings
- Knowledge Check 1: HyperLynx DRC Environment
- Models and Objects Overview
- Assigning Models
- Models in the Integrated Flow
- Knowledge Check 2: HyperLynx DRC Environment
- Settings Files
- Lab: Project Setup Details
- Knowledge Check 3: HyperLynx DRC Environment
- Lab: HyperLynx DRC Project Challenge
- Assessment: HyperLynx DRC Environment
6 HyperLynx DRC Exam 1 Topic
- Level 1 Exam - HyperLynx DRC
Chapters
learning path
- HyperLynx Power Integrity and Thermal Analysis Learning Path Overview
- HyperLynx PI Overview
- DC Drop Analysis
- Decoupling Analysis
- Plane Noise Analysis
- SI/PI Co-Simulation
- Model Extraction
- Thermal Analysis
- HyperLynx Power Integrity & Thermal Analysis Exam
HyperLynx Power Integrity and Thermal Analysis
Learn how to use HyperLynx Power Integrity to detect problems and make corrections related to power planes and the thermal behavior of PCB designs.
Overview of HyperLynx Power Integrity Analysis
HyperLynx Power Integrity and Thermal Analysis 9 Chapters
Learn how to use HyperLynx Power Integrity to detect problems and make corrections related to power planes and the thermal behavior of PCB designs.
1 HyperLynx Power Integrity and Thermal Analysis Learning Path Overview 1 Topic
- Learning Path Overview
2 HyperLynx PI Overview 4 Topics
- Analysis Strategies
- Overview of HyperLynx Power Integrity Analysis
- Knowledge Check 1: Overview and Analysis Strategies
- Assessment : Overview and Analysis Strategies
3 DC Drop Analysis 19 Topics
- Introduction to DC Drop Analysis
- Post-layout DC Drop Analysis
- The PowerScope
- Knowledge Check 1: DC Drop Analysis
- DC Drop Reports
- Lab: Post Layout DC Drop Analysis
- Exporting a PDN to LineSim
- Lab: Exporting a Post Layout PDN to LineSim
- Knowledge Check 2: DC Drop Analysis
- Pre-Layout DC Drop Analysis
- Lab: Pre-Layout DC Drop Analysis
- Configuring DC Drop Batch Analysis
- Knowledge Check 3: DC Drop Analysis
- Running a DC Drop Batch Analysis
- Simulating with Reference Nets
- DC Drop Analysis in Xpedition Layout
- Lab: DC Drop Batch Analysis
- Knowledge Check 4: DC Drop Analysis
- Assessment: DC Drop Analysis
4 Decoupling Analysis 32 Topics
- Introduction to Decoupling Analysis
- Decoupling Analysis Methodology
- Understanding the PDN Impedance
- Types of Decoupling Analysis
- Knowledge Check 1: Decoupling Analysis
- Modeling Decoupling Capacitors
- Decoupling Analysis in the LineSim Environment
- Placing Decoupling Capacitors in the LineSim Environment
- Interactively Specifying Capacitors for Decoupling Analysis
- Specifying Capacitor Models Using the QPL File
- Knowledge Check 2: Decoupling Analysis
- Running the Decoupling Wizard in LineSim Part 1
- Running the Decoupling Wizard in LineSim Part 2
- Running the Decoupling Wizard in LineSim - Demo
- Understanding Quick Decoupling Analysis Results
- Understanding Lumped Decoupling Analysis Results
- Understanding Distributed Decoupling Analysis Results
- Knowledge Check 3: Decoupling Analysis
- Post Layout Decoupling Analysis Flow
- Setting up Capacitors and Power Supplies for Post Layout Decoupling Analysis
- Setting up Capacitors and Power Supplies for Post Layout Decoupling Analysis - Demo
- Knowledge Check 4: Decoupling Analysis
- Running a Post Layout Decoupling Analysis
- Running a Post Layout Decoupling Analysis - Demo Part 1
- Running a Post Layout Decoupling Analysis - Demo Part 2
- Review PDN Design and Decoupling Capacitors
- Lab: PDN Decopling Analysis
- Knowledge Check 5: Decoupling Analysis
- Signal Via Bypass Analysis
- Lab: Signal Via Bypass
- Knowledge Check 6: Decoupling Analysis
- Assessment: Decoupling Analysis
5 Plane Noise Analysis 6 Topics
- Plane Noise Analysis Concepts
- Knowledge Check 1: Plane Noise Analysis Analysis
- Plane Noise Analysis Demonstration
- Lab: Plane Noise Analysis
- Knowledge Check 2: Plane Noise Analysis
- Assessment: Plane Noise Analysis
6 SI/PI Co-Simulation 11 Topics
- The Need for SI/PI Co-Simulation
- SI/PI Co-Simulation
- SI/PI Co-Simulation - Demonstration
- Lab: SI/PI Co-Simulation
- Knowledge Check 1: SI/PI Co-Simulation
- Power Aware IBIS Models
- Simulating with Power Aware IBIS Models
- SSO Analysis with Power Aware IBIS Models
- Lab: Power Aware IBIS Models
- Knowledge Check 2: SI/PI Co-Simulation
- Assessment: SI/PI Co-Simulation
7 Model Extraction 5 Topics
- Via Model Extraction
- Knowledge Check 1: Via Model Extraction
- PDN Model Extraction
- Knowledge Check 2: PDN Model Extraction
- Assessment: PDN Model Extraction
8 Thermal Analysis 15 Topics
- Why Thermal Analysis?
- Running Thermal Analysis
- Knowledge Check 1: Thermal Analysis
- Exporting Xpedition Layout Designs for Thermal Analysis
- Exporting PADS Professional Layout Designs for Thermal Analysis
- Thermal Libraries and Models
- Knowledge Check 2: Thermal Analysis
- The Thermal Environment
- Improving Thermal Performance
- Knowledge Check 3: Thermal Analysis
- DC Drop and Thermal Co-Simulation
- Resolving Settings and Library Problems
- Lab: Thermal Simulation and DC Drop/Thermal Co-simulation
- Knowledge Check 4: Thermal Analysis
- Assessment : Thermal Analysis
9 HyperLynx Power Integrity & Thermal Analysis Exam 1 Topic
- Level 1 Exam - HyperLynx Power Integrity & Thermal Analysis Exam
On-Demand Training - HyperLynx High-Speed PCB
Receive unlimited access to all new content added during your active subscription.
During your subscription period, you will automatically receive access to all new content added to the library, including training on new product releases and technology updates to maximize your proficiency.
On-Demand Training - HyperLynx High-Speed PCB
- 12 month subscription
- Access to cloud-based environment for hands-on lab exercises
- Access to new training content added during the subscription period
- Knowledge assessments to measure learning progress
Starting at
USD $2500.00 / year
USD $2500.00 / year