Learning Center Overview and Calibre Curriculum 1  Chapter

Learn how to get around the Learning Center and get a curriculum map for each user role.

1 Learning Center Overview and Calibre Curriculum 7 Topics

1. Learning Center Overview
2. Video, Quiz, and Lab Times
3. CAD Engineer Curriculum Map
4. IC Layout Engineer Curriculum Map
5. IC Verification Engineer Curriculum Map
6. Foundry Engineer Curriculum Map
7. Circuit Designer Curriculum Map

Calibre Using PERC 6  Chapters

Learn how to set up and execute a variety of Calibre PERC jobs and how to interpret analysis results by working through step-by-step case studies.

1 Introduction to Calibre 6 Topics

1. Calibre Overview for PERC Users
2. Knowledge Check 1: Introduction to Calibre
3. Calibre PERC Overview
4. Knowledge Check 2: Introduction to Calibre
5. Lab 1: Introduction to Calibre
6. Assessment: Introduction to Calibre

2 Introduction to PERC 7 Topics

1. What is Calibre PERC?
2. Using Calibre PERC
3. Knowledge Check 1: Introduction to PERC
4. Working with PERC Output
5. Knowledge Check 2: Introduction to PERC
6. Lab 2: Introduction to PERC
7. Assessment: Introduction to PERC

3 Topology-Driven Applications 8 Topics

1. Analyzing Source Netlist Example
2. Extracting and Analyzing Netlist Examples
3. Knowledge Check 1: Topology Driven Applications
4. Locating ESD Failures Example
5. Identifing Multi-Domain Problems Example
6. Knowledge Check 2: Topology Driven Applications
7. Lab 3: Topology-Driven Applications
8. Assessment: Topology Driven Applications

4 Point-to-Point Resistance 6 Topics

1. Finding Point-to-Point Resistance Values Example
2. Knowlegde Check 1: Point-To-Point Resistance
3. Examining a Worst-Case Path Example
4. Knowledge Check 2: Point-To-Point Resistance
5. Lab 4: Point-To-Point Resistance
6. Assessment: Point-To-Point Resistance

5 Current Density 6 Topics

1. Running a Default CD Job Example
2. Knowledge Check 1: Current Density
3. Examining a Worst-Case Path Example
4. Knowledge Check 2: Current Density
5. Lab 5: Current Density
6. Assessment: Current Density

6 Calibre Using PERC Exam 1 Topic

1. Level 1 Certification - Using Calibre PERC

Calibre Using DESIGNrev 6  Chapters

This learning path will acquaint you with the many layout manipulation features available in Calibre DESIGNrev.

1 Introduction to Calibre DESIGNrev 7 Topics

1. Primary Uses and Benefits of Using Calibre® DESIGNrev
2. Quick Tour of the DESIGNrev GUI
3. Knowledge Check 1: Introduction to Calibre DESIGNrev
4. DESIGNrev Modes of Operation
5. Knowledge Check 2: Introduction to Calibre DESIGNrev
6. Lab 1: Introduction to Calibre DESIGNrev
7. Assessment: Introduction to Calibre DESIGNrev

2 Viewing Layouts 8 Topics

1. Loading Data into Calibre DESIGNrev
2. Managing Layer Appearance in DESIGNrev
3. Knowledge Check 1: Viewing Layouts
4. Controlling Layer Viewability
5. Viewing Cells and Hierarchy
6. Knowledge Check 2: Viewing Layouts
7. Lab 2: Viewing Layouts
8. Assessment: Viewing Layouts

3 Inspecting Layouts 6 Topics

1. Navigating Within a Layout Through DESIGNrev
2. Knowledge Check 1: Inspecting Layouts
3. Working with Rulers and Multiple Layouts
4. Knowledge Check 2: Inspecting Layouts
5. Calibre 2024- EDA-Linux OS
6. Assessment: Inspecting Layouts

4 Editing Layouts 7 Topics

1. Modifying Geometries in DESIGNrev
2. Knowledge Check 1: Editing Layouts
3. Fixing Violations Examples
4. Moving and Replacing Cell Instances
5. Knowledge Check 2: Editing Layouts
6. Lab 4: Editing Layout
7. Assessment: Editing Layouts

5 Calibre DESIGNrev in Your Work Flow 6 Topics

1. Running Calibre Tools From DESIGNrev
2. Knowledge Check 1: Calibre DESIGNrev in Your Work Flow
3. Highlighting Calibre Results and Nets
4. Knowledge Check 2: Calibre DESIGNrev in Your Work Flow
5. Lab 5: DESIGNrev in Your WorkFlow
6. Assessment: Calibre DESIGNrev in Your Work Flow

6 Scripted Layout Manipulation 5 Topics

1. DESIGNrev Scripts, Macros, and Utilities
2. Knowledge Check 1: Scripted Layout Manipulation
3. Using DESIGNrev Scripts
4. Lab 6: Scripted Layout Manipulation
5. Assessment: Scripted Layout Manipulation

Calibre RET/OPC Basics 8  Chapters

This learning path will equip you with a basic understanding of Calibre nmOPC, OPCBIAS, nmSRAF, OPCVerify, and modeling basics; there are NO LABS.

1 Calibre OPCBIAS 5 Topics

1. Calibre OPCBIAS Training 1 – Syntax and Options
2. Calibre OPCBIAS Training 2 – Converting Bias Table to Rules
3. Calibre OPCBIAS Training 3 – Clean Up Process
4. Knowledge Check 1: Calibre OPCBIAS
5. Assessment: Calibre OPCBIAS

2 Calibre RET Modeling - Optical Model 13 Topics

1. Optical Model Training 1 – Optical modeling flow and optical parameter file
2. Optical Model Training 2 – General optical parameters & overview illumination source options
3. Knowledge Check 1: Calibre RET Modeling - Optical Model
4. Optical Model Training 3 – Illumination source options
5. Optical Model Training 4 – Optical kernel and diameter settings
6. Knowledge Check 2: Calibre RET Modeling - Optical Model
7. Optical Model Training 5 – Image and pupil parameter settings
8. Knowledge Check 3: Calibre RET Modeling - Optical Model
9. Optical Model Training 6 – How to invoke optical model tool and define illumination
10. Optical Model Training 7 – How To define kernel, image plane, pupil and film in optical model tool
11. Optical Model Training 8 – How to view optical source, kernel, and Jones Pupil in Calibre WORKbench
12. Knowledge Check 4: Calibre RET Modeling - Optical Model
13. Assessment: Calibre RET Modeling - Optical model

3 Calibre RET Modeling - Compact Resist Model 9 Topics

1. CM1 Model Training 1 – CM1 introduction and model parameters
2. CM1 Model Training 2 – CM1 model terms & CM1 center intro
3. CM1 Model Training 3 – CM1 model calibration flow & operating modes
4. CM1 Model Training 4 – Setting up model calibration in CM1 center – Part 1
5. Knowledge Check 1: Calibre RET Modeling - Compact Resist Model
6. CM1 Model Training 5 – Setting up model calibration in CM1 center – Part 2
7. CM1 Model Training 6 – Setting up model calibration in CM1 center – Part 3
8. Knowledge Check 2: Calibre RET Modeling - Compact Resist Model
9. Assessment: Calibre RET Modeling - Compact resist model

4 Calibre RET Modeling - VEB Etch Model 8 Topics

1. VEB Model Training 1 – Etch modeling basics & kernel options
2. VEB Model Training 2 – Model format & model-based retargeting
3. VEB Model Training 3 – Initial setup for VEB model calibration
4. Knowledge Check 1: Calibre RET Modeling - VEB Etch Model
5. VEB Model Training 4 – Setting up VEB optimization
6. VEB Model Training 5 – Setup file, analysis & run mode
7. Knowledge Check 2: Calibre RET Modeling - VEB Etch Model
8. Assessment: Calibre RET Modeling - VEB etch model

5 Calibre nmOPC 21 Topics

1. nmOPC Training 1 – Introduction
2. nmOPC Training 2 – Basic Elements in OPC Flow
3. nmOPC Training 3 – How to invoke nmOPC & recipe structure
4. nmOPC Training 4 – Layer and background definitions
5. Knowledge Check 1: Calibre nmOPC
6. nmOPC Training 5 – Setlayer command & OPC setup options
7. nmOPC Training 6 – Dense OPC options (part 1)
8. nmOPC Training 7 – Dense OPC options (part 2)
9. nmOPC Training 8 – OPC fragmentation overview & intrafeature fragmentation
10. nmOPC Training 9 – Interfeature & island fragmentation
11. Knowledge Check 2: Calibre nmOPC
12. nmOPC Training 10 – Fragment control & special fragmentation
13. nmOPC Training 11 – Iteration, EPE measurement & feedback control
14. nmOPC Training 12 – Edge movement & MRC control
15. Knowledge Check 3: Calibre nmOPC
16. nmOPC Training 13 – Scripting basics
17. nmOPC Training 14 – Process window OPC introduction & the use model
18. nmOPC Training 15 – Setting up models & process conditions in PWOPC
19. nmOPC Training 16 – Defining PWOPC iterations & tolerance constraints
20. Knowledge Check 4: Calibre nmOPC
21. Assessment: Calibre nmOPC

6 Calibre nmSRAF 10 Topics

1. SRAF Training 1 – Overview Calibre SRAF solutions
2. Knowledge Check 1: Calibre nmSRAF
3. SRAF Training 2 – Invoking nmSRAF & Creating SRAF templates
4. SRAF Training 3 – nmSRAF setup options (part 1)
5. Knowledge Check 2: Calibre nmSRAF
6. SRAF Training 4 – nmSRAF setup options (part 2)
7. SRAF Training 5 – Model-based SRAF insertion (part 1)
8. SRAF Training 6 – Model-based SRAF insertion (part 2)
9. Knowledge Check 3: Calibre nmSRAF
10. Assessment: Calibre nmSRAF

7 Calibre OPCverify 15 Topics

1. OPCverify Training 1 – Basic Recipe Setups
2. OPCverify Training 2 – Model and Layer Definitions
3. OPCverify Training 3 – OPCverify Setup Options & Setlayer Command Basics
4. OPCverify Training 4 – Pinch & Bridge Checks, Extra & Not Printing Checks
5. OPCverify Training 5 – Line End EPE checks
6. Knowledge Check 1: Calibre OPCverify
7. OPCverify Training 6 – Contact Coverage & Alignment Checks
8. OPCverify Training 7 – Poly End Cap & Gate CD Checks
9. OPCverify Training 8 – Measure CD & Contour Distance Checks
10. OPCverify Training 9 – PW Verification – Pvband Generation & Contour Difference Checks
11. OPCverify Training 10 – PW Verification – MEEF, NILS & DOF Checks
12. OPCverify Training 11 – OPCverify Output Options
13. OPCverify Training 12 – Error Classification Basics
14. Knowledge Check 2: Calibre OPCverify
15. Assessment: Calibre OPCverify

8 Calibre OPC Pro 11 Topics

1. Introduction
2. Basics of OPCpro LITHO setup file
3. OPCpro layer types & fragmentation
4. Fragmentation continued
5. Tagging & Sites
6. Edge Movement
7. User tagging & tag sets
8. Simulation tag commands
9. Tagging & optimizing simulation sites
10. WorkBench & RET Flow Tool demo
11. OPCpro mask rule constraints

Calibre Pattern Matching 8  Chapters

Learn how to use both the Pattern Library Manager GUI and SVRF code for pattern capture and pattern comparison.

1 Introduction to Pattern Matching 4 Topics

1. Pattern Matching Concept
2. Pattern Attributes and Libraries
3. Lab: Introduction to Pattern Matching
4. Assessment : Introduction to Patern Matching

2 Pattern Library and Pattern Creation 7 Topics

1. GUI-Based Pattern Capture
2. Pattern Library Manager Tool
3. Knowledge Check 1: Pattern Library and Pattern Creation
4. Rule-Based Pattern Capture
5. Knowledge Check 2: Pattern Library and Pattern Creation
6. Lab: Pattern Library and Pattern Creation
7. Assessment: Pattern Library and Pattern Creation

3 Pattern Capture Customization 7 Topics

1. Pattern Attributes and Properties
2. Pattern Specific Attributes
3. Knowledge Check 1: Pattern Capture Customization
4. Create and Import Attributes
5. Knowledge Check 2: Pattern Capture Customization
6. Lab: Pattern Capture Customization
7. Assessment: Pattern Capture Customization

4 Pattern Extents and Customization 7 Topics

1. Pattern Extents and Constraints
2. Variable Patterns
3. Knowledge Check 1: Pattern Extents and Customization
4. Pattern Debug and Match Reporting
5. Knowledge Check 2: Pattern Extents and Customization
6. Lab: Pattern Extents and Customization
7. Assessment: Pattern Extents and Customization

5 Pattern Classification 7 Topics

1. Pattern Classification
2. Pattern Classification with Shift
3. Knowledge Check 1: Pattern Classification
4. Pattern Classification Debug
5. Knowledge Check 2: Pattern Classification
6. Lab: Pattern Classification
7. Assessment: Pattern Classification

6 Pattern Utilities 3 Topics

1. Pattern Utilities
2. Lab: Pattern Utilities
3. Assessment: Pattern Utilities

7 Pattern Matching 4 Topics

1. Pattern Matching
2. Pattern Match Reporting
3. Lab: Pattern Matching
4. Assessment: Pattern Matching

8 Calibre Pattern Matching Exam 1 Topic

1. Level 1 Exam - Calibre Pattern Matching

Calibre xRC 9  Chapters

The Calibre xRC Parasitic Extraction course will help you learn  how to use the powerful Calibre xRC tool to extract parasitic information from your IC layouts.

1 Basics of Parasitic Extraction 6 Topics

1. Introduction to Calibre xRC
2. Knowledge Check 1: Basics of Parasitic Extraction
3. Parasitic Extraction Basics
4. Parasitic Networks
5. Knowledge Check 2: Basics of Parasitic Extraction
6. Assessment: Basics of Parasitic Extraction

2 Calibre xRC Basics 7 Topics

1. Calibre xRC Inputs and Outputs
2. Knowledge Check 1: Calibre xRC Basics
3. Calibre xRC Extraction Stages Part-1
4. Calibre xRC Extraction Stages Part-2
5. Knowledge Check 2: Calibre xRC Basics
6. Lab: Calibre xRC Basics
7. Assessment: Calibre xRC Basics

3 Extracting with Calibre xRC 8 Topics

1. Inspecting Transcripts
2. Calibre xRC Reports Part 1
3. Knowlege Check 1: Extracting with Calibre xRC
4. Calibre xRC Reports Part 2
5. Parasitic Inspection using Calibre RVE and Calibre DESIGNrev
6. Knowlege Check 2: Extracting with Calibre xRC
7. Lab: Extracting with Calibre xRC
8. Assessment: Extracting with Calibre xRC

4 Leveraging Design Hierarchy 11 Topics

1. Flat Extraction
2. Gate Level Extraction
3. Knowledge Check 1: Leveraging Design Hierarchy
4. Hierarchical Memory and Mixed-Signal Hiererchical Extraction
5. In-context Extraction
6. ADMS Extraction
7. Hierarchy Control Using XCells
8. Extraction Summary
9. Knowledge Check 2: Leveraging Design Hierarchy
10. Lab: Leveraging Design Hierarchy
11. Assessment: Leveraging Design Hierarchy

5 Netlist Extraction 6 Topics

1. Netlist Extraction
2. Knowledge Check1: Netlist Extraction
3. Specifying PEX Netlist Options
4. Knowledge Check2: Netlist Extraction
5. Lab: Netlist Extraction
6. Assessment: Netlist Extraction

6 Parasitic Reduction Techniques 7 Topics

1. Parasitic Reduction Techniques - Part 1
2. Parasitic Reduction Techniques - Part 2
3. Knowledge Check 1: Parasitic Reduction Techniques
4. Metal Fill Extraction and Reduction
5. Knowledge Check 2: Parasitic Reduction Techniques
6. Lab: Parasitic Reduction Techniques
7. Assessment: Parasitic Reduction Techniques

7 Handling Parasitic On-Chip Variation 2 Topics

1. Layer Mapping
2. Assessment: Handling Parasitic On-Chip Variation

8 Appendix A: Extraction in Memory, Analog/RF and Mixed Signal 1 Topic

1. Appendix A: Extraction in Memory, Analog/RF and Mixed Signal

9 Calibre xRC Exam 1 Topic

1. Level 1 Exam - Calibre xRC

Calibre xACT/xACT 3D 6  Chapters

Learn how to use Calibre xACT and Calibre xACT 3D to extract parasitics from your IC layout.

1 Selecting an Extraction Tool 8 Topics

1. The Calibre Parasitic Extraction Family
2. Calibre xACT Run
3. Knowledge Check 1: Selecting an Extraction Tool
4. Calibre xACT 3D Run
5. Calibre xACT Options
6. Knowledge Check 2: Selecting an Extraction Tool
7. Lab: Run a Calibre xACT Job
8. Assessment: Selecting an Extraction Tool

2 Set Up and Run Calibre xACT (GUI) 9 Topics

1. Using the GUI to Specify Calibre xACT Inputs
2. Using the GUI to specify the Calibre xACT Mode
3. Knowledge Check 1: Set Up and Run Calibre xACT (GUI)
4. Using the GUI to Specify Extraction Type
5. Using the GUI to Specify xACT Output Files
6. Using the GUI to Specify xACT Job Options
7. Knowledge Check 2: Set Up and Run Calibre xACT
8. Lab: Use the GUI to Set Up a Run
9. Assessment: Set Up and Run Calibre xACT

3 Set Up and Run Calibre xACT (SVRF) 9 Topics

1. Using SVRF to Specify Calibre xACT Inputs
2. Using SVRF to Specify the Calibre xACT Mode
3. Using the Command Line to Specify Extraction Type
4. Knowledge Check 1: Set Up and Run Calibre xACT (SVRF)
5. Using SVRF to Specify xACT Output Files
6. Using SVRF to Specify xACT Job Options
7. Knowledge Check 2: Set Up and Run Calibre xACT (SVRF)
8. Lab: Use SVRF to Set Up a Run
9. Assessment: Set Up and Run Calibre xACT (SVRF)

4 Review Extraction Results 9 Topics

1. Calibre PEX DSPF Netlist Structure
2. Calibre PEX HSPICE Netlist Structure
3. Accessing PEX Results with RVE
4. Knowledge Check 1: Review Extraction Results
5. Using RVE to Display PEX Results
6. Using RVE to Cross-Probe PEX Results
7. Knowledge Check 2: Review Extraction Results
8. Lab: Working with RVE
9. Assessment: Review Extraction Results

5 Parasitic Reduction 12 Topics

1. Introduction to Reduction
2. R-Only Reduction
3. MINRES Reduction
4. Coupled Capacitance Reduction
5. Knowledge Check 1: Parasitic Reduction
6. MINCAP Reduction
7. TICER Reduction
8. Parasitic Network Reduction Recipes
9. Metal Fill Extraction and Reduction
10. Knowledge Check 2: Parasitic Reduction
11. Lab: Parasitic Reduction
12. Assessment: Parasitic Reduction

6 Working with Extraction Hierarchy 9 Topics

1. Flat Extraction
2. Gate-Level Extraction
3. Hierarchy Control with xCells
4. Knowledge Check 1: Working with Exraction Hierarchy
5. Ideal Extraction
6. Multi-Corner Parasitic Extraction
7. Knowledge Check 2: Working with Extraction Hierarchy
8. Lab: Working with Extraction Hierarchy
9. Assessment: Working with Extraction Hierarchy

Calibre RealTime Custom 4  Chapters

You will explore the features offerred with Calibre RealTime that will increase productivity over Calibre Interactive in the form of videos and knowledge checks

1 Introduction to Calibre RealTime 2 Topics

1. A Quick Introduction to Calibre RealTime Custom
2. Assessment: Introduction to Calibre RealTime

2 Using the RealTime Toolbar 2 Topics

1. Using the RealTime Toolbar
2. Assessment: Using the RealTime Toolbar

3 Configuring the RealTime Toolbar 2 Topics

1. Configuring and Using RealTime options with Synopsys Custom Compiler
2. Assessment: Configuring the RealTime Toolbar

4 Rulecheck Selection in RealTime 2 Topics

1. Configuring and Using RealTime options
2. Assessment: Rulecheck Selection in RealTime

Calibre Writing PERC Rules 11  Chapters

Learn how to set up and execute a variety of Calibre PERC jobs and how to interpret analysis results by working through step-by-step case studies.

1 Introduction to PERC 7 Topics

1. Calibre PERC Applications and Flow
2. Knowledge Check 1: Introduction to PERC
3. Calibre PERC and Circuit Hierarchy
4. Invoke Calibre PERC and Review Results
5. Knowledge Check 2: Introduction to PERC
6. Lab 1: Running a Calibre PERC Job
7. Assessment: Introduction to PERC

2 Creating PERC Control Files 7 Topics

1. PERC Rule File Structure
2. Knowledge Check 1: Creating PERC Control Files
3. Topology Analysis
4. Circuit Properties and Transformation
5. Knowledge Check 2: Creating PERC Control Files
6. Lab 2: Create a Calibre PERC Control File
7. Assessment: Creating PERC Control Files

3 PERC Initialization 8 Topics

1. The Concept of PERC Nets and Paths
2. Initializing PERC Nets
3. Knowledge Check 1: PERC Initialization
4. Initializing PERC Paths
5. Assign Device Pins to Nets and Paths
6. Knowledge Check 2: PERC Initialization
7. Lab 3: Writing Initialization Command
8. Assessment: PERC Initialization

4 Topology Analysis Part 1 8 Topics

1. PERC Rule Procedure Overview
2. PERC Iterators
3. Knowledge Check 1: Topology Analysis Part 1
4. Using Pin and Nets Conditions
5. Implement PERC Analysis
6. Knowledge Check 2: Topology Analysis Part 1
7. Lab 4: Writing Calibre PERC Rule Procedures
8. Assessment: Topology Analysis Part 1

5 Topology Analysis Part II 7 Topics

1. Topology Analysis Part_2
2. Knowledge Check 1: Topology Analysis Part II
3. PERC Report
4. Using Circuit Pattern Templates
5. Knowledge Check 2: Topology Analysis Part II
6. Lab 5: Enhancing A Condition Procedure
7. Assessment: Topology Analysis Part II

6 Voltage Propagation 7 Topics

1. Voltage Dependent Circuit Analysis
2. Knowledge Check 1: Voltage Propagation
3. Vectored Propagation
4. PERC Analysis With Voltage Drop
5. Knowledge Check 2: Voltage Propagation
6. Lab 6: Finding Floating Gates
7. Assessment: Voltage Propagation

7 LDL Flow 5 Topics

1. Calibre PERC LDL Flow
2. PERC Code Structure for LDL Applications
3. Reporting Pad to Gate Resistance
4. Lab 7: Debugging a PERC LDL Rule File
5. Assessment: LDL Flow

8 Point to Point Resistance Analysis 6 Topics

1. Configuring PERC P2P
2. Knowledge Check 1: Point-to-Point Resistance Analysis
3. Implementing PERC P2P Experiments
4. Knowledge Check 2: Point-to-Point Resistance Analysis
5. Lab 8: Enhancing a P2P Rule File
6. Assessment: Point-to-Point Resistance Analysis

9 Current Density Analysis 7 Topics

1. Configuring PERC CD
2. Knowledge Check 1: Current Density Analysis
3. PERC CD Threshold Settings
4. PERC CD Experiments
5. Knowledge Check 2: Current Density Analysis
6. Lab 9: Creating CD Experiments
7. Assessment: Current Density Analysis

10 Coding Examples 5 Topics

1. PERC Coding Examples Net Connections Analysis
2. PERC Coding Example Verify Level Shifter Connection
3. PERC Coding Examples Verify Low Voltage MOS ESD Protection
4. Debugging the PERC Rule File
5. Lab 10: Debug a Code Error

11 Calibre Writing PERC Rules Exam 1 Topic

1. Level 1 Exam - Calibre Advanced Topics: Writing PERC Rules

Calibre Fundamentals: Writing DRC/LVS Rules 16  Chapters

This course covers Calibre nmDRC and nmLVS rule writing for layout design verification in a semiconductor process. 

1 Calibre Basic Concepts 9 Topics

1. Inroduction to Calibre
2. DRC Layout verification Process flow
3. DRC Run Outputs
4. Knowledge Check 1: Calibre Basic Concepts
5. LVS Layout verification Process flow
6. LVS Run Outputs
7. Knowledge Check 2: Calibre Basic Concepts
8. Lab: Calibre Basic Concepts
9. Assessment

2 SVRF Rule File Basics 10 Topics

1. Introduction to SVRF
2. SVRF Boolean Operations
3. Knowledge Check 1: SVRF Rule File Basics
4. Writing Rule Checks
5. Layout Precision
6. DRC and LVS Specific Features
7. Pre-processor Directives and Conditional Statements
8. Knowledge Check 2: SVRF Rule File Basics
9. Lab: SVRF Rule File Basics
10. Assessment

3 Dimensional Checks 7 Topics

1. Implementing Calibre rule dimensional checks
2. Edge-Based Dimensional Checks
3. Knowledge Check 1: Dimensional Checks
4. Modifying Dimensional Check Output
5. Knowledge Check 2: Dimensional Checks
6. Lab: Dimensional Checks
7. Assessment

4 Dimensional Check Keywords 6 Topics

1. External and internal dimensional checks keywords
2. Knowledge Check 1: Dimensional Check Keywords
3. Enclosure dimensional check keywords
4. Knowledge Check 2: Dimensional Check Keywords
5. Lab: Dimensional Check Keywords
6. Assessment

5 Layer Operations 1 8 Topics

1. Deriving Polygons Using Layer Operations
2. Deriving Vias Using Layer Operations
3. Knowledge Check 1: Layer Operations 1
4. Verifying Transistor Drawing In Layout
5. Deriving Edge Layers Using Layer Operations
6. Knowledge Check 2: Layer Operations 1
7. Lab: Layer Operations 1
8. Assessment

6 Layer Operations 2 7 Topics

1. Layer Constructors and Layer Selectors
2. Knowledge Check 1: Layer Operations 2
3. Achieving Specific Constraints Using Layer Operations Keywords
4. Additional Layer Operations Keywords
5. Knowledge Check 2: Layer Operations 2
6. lab: Layer Operations 2
7. Assessment

7 Rule File Optimization and DRC Application Examples 6 Topics

1. Reading The Transcript And Log View Utility
2. Knowledge Check 1: Rule File Optimization and DRC Application Examples
3. Implementing Optimized DRC Rules
4. Knowledge Check 2: Rule File Optimization and DRC Application Examples
5. lab: Optimization
6. Assessment

8 Connectivity and Text 8 Topics

1. Working With Layout Text
2. Text Labels Attachment
3. Knowledge Check 1: connectivity and text
4. Establishing Connectivity
5. Soft Connections
6. Knowledge Check 2: connectivity and text
7. lab: connectivity and text
8. Assessment

9 Working with Antennas 4 Topics

1. Antenna Theory and Net Area Ratio
2. Improving Antenna Accuracy
3. lab: Working with Antennas
4. Assessment

10 Properties and Equation Based DRC 7 Topics

1. Layers With Properties
2. Creating Layers With Properties
3. Knowledge Check 1: Properties and Equation Based DRC
4. Equation Based DRC
5. Knowledge Check 2: Properties and Equation Based DRC
6. lab: Properties and Equation Based DRC
7. Assessment

11 Macros and TVF 6 Topics

1. Macros and Introducing TVF
2. Knowledge Check 1: Macros and TVF
3. Practical TVF Example
4. Knowledge Check 2: Macros and TVF
5. lab: Macros and TVF
6. Assessment

12 Runtime TVF 4 Topics

1. Runtime TVF
2. Layout Analysis with Runtime TVF
3. Lab: Runtime TVF
4. Assessment

13 Device Recognition 7 Topics

1. Device Recognition for LVS
2. LVS Built-in Devices
3. Knowledge Check 1: Device Recognition
4. Custom Devices
5. Knowledge Check 2: Device Recognition
6. Lab: Device Recognition
7. Assessment

14 Device Computation 4 Topics

1. Device Computation
2. Fully Custom Device Computation
3. lab: Device Computation
4. Assessment

15 Device Annotation 4 Topics

1. Tcl Computation for Device Properties
2. Device Annotation
3. lab: Device Annotation
4. Assessment

16 Curvilinear and Interface Only DRC 2 Topics

1. Curvilinear DRC Waiver
2. Interface Only DRC Waiver

Tcl/Tk for Calibre Applications 3  Chapters

This course teaches the fundamentals of Tcl and Tk programming, which helps understand and apply programming in Advanced Calibre applications.

1 Tcl Basics 8 Topics

1. Tcl Basics
2. Tcl List
3. Knowledge Check 1: Tcl Basics
4. Mathematical Expressions
5. Conditional Tcl and Looping Constructs
6. Knowledge Check 2: Tcl Basics
7. Lab 1: Tcl Basics
8. Assessment: Tcl Basics

2 Tcl/Tk Applications 8 Topics

1. Tk Basics
2. Tk Basic Widgets
3. Knowledge Check 1: Tcl/Tk Applications
4. Tk Drawing
5. Tcl/Tk and Calibre DESIGNrev
6. Knowledge Check 2: Tcl/Tk Applications
7. Lab 2: Tcl/Tk Applications
8. Assessment: Tcl/Tk Applications

3 Tk Actionable Items 7 Topics

1. Tk Action Triggers
2. Tk Dynamic Visualization
3. Knowledge Check 1: Tk Actionable Items
4. Dynamic GUI updates
5. Knowledge Check 2: Tk Actionable Items
6. Lab 3: Tk Actionable Items
7. Assessment: Tk Actionable Items

Calibre Advanced Topics: Multi-Patterning 9  Chapters

This course is designed for design and foundry engineers to deploy Calibre Multi-Patterning to meet the design to manufacturing needs for technology below 20nm

1 Introduction to Multi-Patterning 4 Topics

1. Introduction to Multi-Patterning
2. Double-Patterning Concepts
3. Lab: Multi-Patterning Basics
4. Assessment: Introduction to Multi-Patterning

2 DRC Methods for DP 4 Topics

1. DRC with DP
2. DP Odd-cycle Analysis
3. Lab: DRC Methods for DP
4. Assessment: DRC Methods for DP

3 Debugging DP Violations 7 Topics

1. Basic DP Violations
2. Debugging Complex Odd-cycles
3. Knowledge check 1: Debugging DP Violations
4. Debugging DP Path Violations
5. Knowledge check 2: Debugging DP Violations
6. Lab: Debugging DP Violations
7. Assessment: Debugging DP Violations

4 Automated Decomposition 7 Topics

1. Automated Decomposition
2. Decomposition Flow
3. Knowlege Check 1: Automated Decomposition
4. Double-Patterning Decomposition
5. Knowlege Check 2: Automated Decomposition
6. Lab: Automated Decomposition
7. Assessment: Automated Decomposition

5 Automated Stitching 7 Topics

1. DP Stitching
2. Automated Stitching
3. Knowledge Check 1: Automated Stitching
4. Influencing Stitch Outcome
5. Knowledge Check 2: Automated Stitching
6. Lab: Automated Stitching
7. Assessment: Automated Stitching

6 Using DP with Other Tools 9 Topics

1. Calibre DP with Place & Route Tools
2. DP-Aware Cell Design
3. Knowledge Check 1: Using DP with Other Tools
4. DP Related Density Issues
5. Knowledge Check 2: Using DP with Other Tools
6. DP in Automated Routing Tools
7. Knowledge Check 3: Using DP with Other Tools
8. Lab: Using DP with Other Tools
9. Assessment: Using DP with Other Tools

7 Beyond Multi-Patterning 4 Topics

1. Triple-Patterning
2. Triple-Patterning Conflict Visualization
3. Lab: Beyond Multi-Patterning
4. Assessment: Beyond Double-Patterning

8 Writing Multi-Patterning Rules 4 Topics

1. Writing Multi-Patterning Rules
2. Stitching in Multi-Patterning Rules
3. Lab: Writing Multi-Patterning Rules
4. Assessment: Writing Multi-Patterning Rules

9 Calibre Advanced Topics: Calibre Multi-Patterning Exam 1 Topic

1. Level 1 Exam Calibre Advanced Topics: Calibre Multi-Patterning

Using Calibre nmDRC/nmLVS 11  Chapters

This learning path provides everything you need to get started using Calibre nmDRC/nmLVS, including how to set up and run the jobs and how to analyze results.

1 Calibre Basic Concepts 6 Topics

1. Introduction to Calibre
2. Knowledge Check 1: Calibre Basic Concepts
3. Using Calibre GUI
4. Knowledge Check 2: Calibre Basic Concepts
5. Lab: Calibre Basic Concepts
6. Assessment: Calibre Basic Concepts

2 Calibre nmDRC Basics 7 Topics

1. Set Up nmDRC Run
2. DRC Output Results
3. Knowledge Check 1: Calibre nmDRC Basics
4. Common DRC RVE Tasks
5. Knowledge Check 2: Calibre nmDRC Basics
6. Lab: Calibre nmDRC Basics
7. Assessment: Introduction to Calibre nmDRC

3 Calibre nmDRC Job Customization 9 Topics

1. nmDRC Job Basic Customization
2. Conditional SVRF Execution
3. Knowledge Check 1: Calibre nmDRC Job Customization
4. Layout Halos
5. Performance Enhancing Options Employment
6. DRC Debugging Enhancement Using RVE
7. Knowledge Check 2: Calibre nmDRC Job Customization
8. Lab: Calibre nmDRC Job Customization
9. Assessment: Calibre nmDRC Job Customization

4 Calibre nmDRC Additional Topics 8 Topics

1. Create DRC HTML Report file and Customize Rule Selection Recipe
2. Fix and Waive RVE Results
3. Knowledge Check 1: Calibre nmDRC Additional Topics
4. Additional RVE Features
5. Layout-versus-Layout (LVL) options
6. Knowledge Check 2: Calibre nmDRC Additional Topics
7. Lab: Calibre nmDRC Additional Topics
8. Assessment: Calibre nmDRC Additional Topics

5 Calibre nmLVS Basics 9 Topics

1. Calibre nmLVS Process Flow
2. Executing a Calibre nmLVS Job
3. Knowledge Check 1: Calibre nmLVS Basics
4. Reviewing nmLVS Job Output
5. Common LVS RVE Tasks
6. Working with Cells
7. Knowledge Check 2: Calibre nmLVS Basics
8. Lab: Calibre nmLVS Basics
9. Assessment: Calibre nmLVS Basics

6 Texting and Connectivity 12 Topics

1. Initial Correspondence Points
2. Hierarchical Text Objects
3. Knowledge Check 1: Texting and Connectivity
4. LAYOUT TEXT and TEXT Statements
5. Text Attachment Methods
6. Knowledge Check 2: Texting and Connectivity
7. Texting Problems
8. Soft Connections
9. Virtual Connectivity
10. Knowledge Check 3: Texting and Connectivity
11. Lab: Texting and Connectivity
12. Assessment: Working with Text and Connectivity

7 Troubleshooting Shorts and Opens 7 Topics

1. Shorts and Opens Debugging
2. Knowledge Check 1: Troubleshooting Shorts and Opens
3. Power and Ground Discrepancies
4. Troubleshooting Supply Problems
5. Knowledge Check 2: Troubleshooting Shorts and Opens
6. Lab: Troubleshooting Shorts and Opens
7. Assessment: Troubleshooting Shorts and Opens

8 Troubleshooting Device Problems 7 Topics

1. Troubleshooting Malformed Devices
2. Device Property Tracing
3. Knowledge Check 1: Troubleshooting Device Problems
4. Troubleshooting Misconnected Devices
5. Knowledge Check 2: Troubleshooting Device Problems
6. Lab: Troubleshooting Device Problems
7. Assessment:Troubleshooting Device Problems

9 Calibre nmLVS Additional Topics 9 Topics

1. Viewing Netlists and Schematics
2. LVS ISOLATE SHORTS Features
3. Knowledge Check 1: Calibre nmLVS Additional Topics
4. Device Reduction
5. Logic Injection
6. Enhancing nmLVS Job Performance
7. Knowledge Check 2: Calibre nmLVS Additional Topics
8. Lab: Calibre nmLVS Additional Topics
9. Assessment: Calibre nmLVS Additional Topics

10 Antennas, ERC, and Geometric Output 6 Topics

1. Antenna Rule Basics
2. Knowledge Check 1: Antennas, ERC, and Geometric Output
3. Electrical Rule Checks
4. Knowledge Check 2: Antennas, ERC, and Geometric Output
5. Lab: Antennas, ERC, and Geometric Output
6. Assessment: Antennas, ERC, and Geometric Output

11 Calibre Interactive Additional Features 6 Topics

1. Common DRC and LVS Interactive Features
2. Knowledge Check 1: Calibre Interactive Additional Features
3. Cell Preservation and Hierarchical Cell Analysis
4. Knowledge Check 2: Calibre Interactive Additional Features
5. Lab: Calibre Interactive Additional Features
6. Assessment: Calibre Interactive Additional Features

Insight Analyzer 4  Chapters

The Insight tool focuses on leakage and floating gates issues, enabling users to perform early pre-layout checks on their netlist.

1 Introduction to Insight Analyzer 5 Topics

1. Insight Analyzer Overview
2. Insight Analyzer Basic Workflow
3. Insight Analyzer Documentation
4. Lab: Introduction to Insight Analyzer
5. Assessment: Introduction to Insight Analyzer

2 Insight Analyzer Advanced Workflows 8 Topics

1. Overview on Workflow Modes
2. Defining the Power State Table
3. Knowledge Check 1: Insight Analyzer Advanced Workflows
4. Batch Mode in Insight Analyzer
5. Reviewing Insight Analyzer Results
6. Knowledge Check 2: Insight Analyzer Advanced Workflows
7. Lab: Insight Analyzer Advanced Workflows
8. Assessment: Insight Analyzer Advanced Workflows

3 Controlling Results Scope in Insight Analyzer 7 Topics

1. Limiting Results Scope
2. GrayBoxing in Insight Analyzer
3. Knowledge Check 1: Controlling Results Scope in Insight Analyzer
4. BlackBoxing in Insight Analyzer
5. Knowledge Check 2: Controlling Results Scope in Insight Analyzer
6. Lab: Controlling Results Scope in Insight Analyzer
7. Assessment: Controlling Results Scope in Insight Analyzer

4 Insight Analyzer Exam 1 Topic

1. Level 1 Exam - Insight Analyzer

Calibre Mastering eqDRC 10  Chapters

This is an advanced course that equips students with the know-how to create solutions for complex physical design verification or layout analysis.

1 Introduction to eqDRC 4 Topics

1. Unlimited possibilities with Equation-based DRC
2. Layer with properties
3. Lab: Introduction to eqDRC
4. Assessment: Introduction to eqDRC

2 Measurement Functions 5 Topics

1. Measurement functions
2. Multi layer measurements
3. Measurement functions modifiers
4. Lab: Measurement Functions
5. Assessment:

3 eqDRC Solutions 4 Topics

1. Geometric layout analysis
2. Equation based layout analysis
3. Lab: eqDRC Solutions
4. Assessment: eqDRC Solutions

4 Multi-Layer Property Expressions 5 Topics

1. Multi-layer property expressions
2. Reuse existing properties
3. Controlling clusters
4. Lab: Multi-layer property expressions
5. Assessment: Multi-Layer Property Expressions

5 Conditional Expressions 4 Topics

1. Conditional expressions
2. Design eqDRC solutions
3. Lab: Conditional expressions
4. Assessment: Conditional expressions

6 Reporting eqDRC Results 5 Topics

1. Reporting eqDRC results
2. Organizing RDB data
3. Displaying Properties
4. Lab: Reporting eqDRC results
5. Assessment: Reporting eqDRC results

7 Hierarchical Considerations and Code Reuse 5 Topics

1. Hierarchical considerations
2. Writing runtime efficient eqDRC code
3. Code reuse with DFM Function
4. Lab: Hierarchical Considerations
5. Assessment: Hierarchical Considerations

8 eqDRC Applications 4 Topics

1. Identify current crowding over transistor gates
2. Complete solution to via optimization
3. Lab: eqDRC Applications
4. Assessment: eqDRC Applications

9 Building Net Clusters 4 Topics

1. Building net clusters
2. Property accumulation
3. Lab: Building Net Clusters
4. Assessment: Building Net Clusters

10 Calibre Mastering eqDRC Exam 1 Topic

1. Level 1 Exam - Calibre Mastering eqDRC

Calibre Fundamentals: Using LVS Rules Exam 1  Chapter

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Calibre Fundamentals: Using DRC Rules Exam 1  Chapter

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Calibre Using PERC Exam 1  Chapter

Earners of this badge have successfully completed the 25-question exam to show comprehensive knowledge of coding for Calibre PERC.

1 Calibre Using PERC Exam 1 Topic

1. Level 1 Certification - Using Calibre PERC

Calibre DESIGNRev Exam 1  Chapter

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1. Level 1 Certification Exam - Calibre DESIGNRev

Calibre Writing PERC Rules Exam 1  Chapter

Show your comprehensive coding knowledge for Calibre PERC.

1 Calibre Writing PERC Rules Exam 1 Topic

1. Level 1 Exam - Calibre Advanced Topics: Writing PERC Rules

Calibre Pattern Matching Exam 1  Chapter

Earners of this badge have successfully completed the 50-question exam to show basic knowledge of applying Calibre Pattern Matching applications.

1 Calibre Pattern Matching Exam 1 Topic

1. Level 1 Exam - Calibre Pattern Matching

Insight Analyzer Exam 1  Chapter

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1. Level 1 Exam - Insight Analyzer

Calibre xACT/xACT 3D Exam 1  Chapter

Earners of this badge have successfully completed the 50-question exam to show basic knowledge of using CalibrexACT/xACT 3D.

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Calibre xRC Exam 1  Chapter

Earners of this badge have successfully completed the 25-question exam to show basic knowledge of Calibre® xRC™.

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Tcl/Tk for Calibre Applications Exam 1  Chapter

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Calibre Fundamentals: Writing DRC/LVS Rules Exam 1  Chapter

Earners of this badge have completed the 50-question exam to effectively write and maintain Calibre nmDRC and nmLVS rule decks for semiconductor processes.

1 Calibre Fundamentals: Writing DRC/LVS Rules Exam 1 Topic

1. Level 1 Exam - Calibre Fundamentals: Writing DRC/LVS Rules