Siemens Xcelerator Academy: On-Demand Training

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On-Demand Training - Tessent Integrated Flow

Description

Learn how to implement MBIST, Boundary Scan, IJTAG, Scan Insertion, and TestKompress into your design to obtain high test quality using multiple Tessent tools.

12 month subscription
Access to cloud-based environment for hands-on lab exercises
Access to new training content added during the subscription period
Knowledge assessments to measure learning progress

Explore This On-Demand Training

Content Details

Starting at
USD $700.00 / year
Buy

Chapters

learning path

Tessent Integrated Flow On-Demand Training

You will learn how to access infohub, get help within Tessent tools and use the Support Center.

Preview Chapter

Getting Started with Tessent Shell

Tessent Integrated Flow On-Demand Training 8 Chapters

You will learn how to access infohub, get help within Tessent tools and use the Support Center.

1 Tessent Shell Overview 13 Topics

Getting Started with Tessent Shell
Understanding Contexts and System Modes
Knowledge Check 1: Tessent Shell Overview
Design Objects, Attributes, and Data Models
Creating and Using Collections
Design Editing
Knowledge Check 2: Tessent Shell Overview
Design Introspection
Design Tracing
Understanding Configuration Specifications
Knowledge Check 3: Tessent Shell Overview
Virtual Lab: Tessent Shell Overview
Assessment: Tessent Shell Overview

2 IJTAG Introduction 13 Topics

Understanding the IEEE 1687 Objectives
Contrasting IJTAG with IEEE 1149.1 and 1500
Connecting IJTAG to IEEE 1149.1 and 1500
Knowledge Check 1: IJTAG Introduction
Using ICL and PDL files
Virtual Lab 1: IJTAG Introduction
Retargeting PDL in the Design
Basic Timing and Clock Definition
ICL Network Extraction
Knowledge Check 2: IJTAG Introduction
Understanding the STI and SRI Differences
Virtual Lab 2: IJTAG Introduction
Assessment: IJTAG Introduction

3 Basic Block-based Bottom-up DFT Flow Overview 13 Topics

Introduction to Basic Flow Used for all Design Levels
Design Context, Design Id, and Loading Designs
Specifying Design Level and TSDB Output Directory
Creating and Processing DFT Specifications
Knowledge Check 1: Basic Block-based Bottom-up DFT Flow Overview
Viewing, Editing, and Customizing DFT Specifications
Using the DefaultsSpecifications
Using the Tessent Shell Database (TSDB)
Knowledge Check 2: Basic Block-based Bottom-up DFT Flow Overview
PatternsSpecification and Test Bench Simulation
Virtual Lab: Basic Block-based Bottom-up DFT Flow Overview
Understanding Top-level Differences
Assessment: Basic Block-based Bottom-up DFT Flow Overview

4 MBIST Creation Overview 15 Topics

Loading the Design and Libraries
Loading the Design and Libraries: Examples and Additional Commands
Setting the Requirements for DFT Implementation
DFT Specification Creation and Loading Overview
Editing and Processing the DFT Specification
Knowledge Check 1: BIST Creation Overview
Perform ICL Network Extraction
Creating and Processing the PatternsSpecificaton
Simulating Patterns for Validation
Virtual Lab: MBIST Creation Overview
Clocks Overview
Knowledge Check 2: BIST Creation Overview
MBIST Differences at the Chip Level
Understanding Auxiliary BSCAN for TAM, InputOutputPorts
Assessment: MBIST Creation Overview

5 Logic Test Creation 12 Topics

Introduction to Logic Test
Understanding DFT signals
On-chip Clock Controller (OCC) Insertion
Pre-DFT DRCs and Common Debugging
Creating and Customizing a specification for Logic Test
Knowledge Check 1: Logic Test Creation
Modal Connections
Synthesis Optimization Requirements
Knowledge Check 2: Logic Test Creation
Pattern Specification and Simulation
Virtual Lab: Logic Test Creation
Assessment: Logic Test Creation

6 Scan Insertion 9 Topics

Multi-mode Scan Insertion
Multi-mode Scan Insertion: Command Examples
Hierarchical DFT Overview
Knowledge Check 1: Scan Insertion
Hierarchical Scan Insertion
Virtual Lab: Scan Insertion
Introduction to VersaPoints Test Points
Knowledge Check 2: Scan Insertion
Assessment: Scan Insertion

7 Test Pattern Generation 15 Topics

Overview of Automatic Test Pattern Generation (ATPG)
Flat ATPG
Knowledge Check 1: Test Pattern Generation
Saving ATPG Results
Compiling and Simulating Verilog Patterns
Virtual Lab 1: Test Pattern Generation
Knowledge Check 2: Test Pattern Generation
Transition ATPG Patterns
Virtual Lab 2: Test Pattern Generation
Knowledge Check 3: Test Pattern Generation
Hierarchical ATPG
Pattern Retargetting
Virtual Lab 3: Test Pattern Generation
Knowledge Check 4: Test Pattern Generation
Assessment: Test Pattern Generation

Chapter

learning path

Tessent Integrated Flow Exam

Demonstrate your skills and knowledge in Tessent Integrated Flow and earn a verifiable badge.

2 Learning Paths

8 Chapters

91 Topics

5 Hours of Video

Outline

Receive unlimited access to all new content added during your active subscription.

During your subscription period, you will automatically receive access to all new content added to the library, including training on new product releases and technology updates to maximize your proficiency.

On-Demand Training - Tessent Integrated Flow

12 month subscription
Access to cloud-based environment for hands-on lab exercises
Access to new training content added during the subscription period
Knowledge assessments to measure learning progress

Starting at
USD $700.00 / year

Buy

Change this page to

On-Demand Training - Tessent Integrated Flow

Description

Explore This On-Demand Training

Content Details

Tessent Integrated Flow On-Demand Training

Getting Started with Tessent Shell

Tessent Integrated Flow On-Demand Training 8 Chapters

1 Tessent Shell Overview 13 Topics

2 IJTAG Introduction 13 Topics

3 Basic Block-based Bottom-up DFT Flow Overview 13 Topics

4 MBIST Creation Overview 15 Topics

5 Logic Test Creation 12 Topics

6 Scan Insertion 9 Topics

7 Test Pattern Generation 15 Topics

Tessent Integrated Flow Exam

Tessent Integrated Flow Exam 1 Chapter

1 Tessent Integrated Flow Exam 1 Topic

On-Demand Training - Tessent Integrated Flow

Change this page to

mouse On-Demand Training - Tessent Integrated Flow

Description

Explore This On-Demand Training

Content Details

Tessent Integrated Flow On-Demand Training

Getting Started with Tessent Shell

Tessent Integrated Flow On-Demand Training 8 Chapters

1 Tessent Shell Overview 13 Topics

2 IJTAG Introduction 13 Topics

3 Basic Block-based Bottom-up DFT Flow Overview 13 Topics

4 MBIST Creation Overview 15 Topics

5 Logic Test Creation 12 Topics

6 Scan Insertion 9 Topics

7 Test Pattern Generation 15 Topics

Tessent Integrated Flow Exam

Tessent Integrated Flow Exam 1 Chapter

1 Tessent Integrated Flow Exam 1 Topic

mouse On-Demand Training - Tessent Integrated Flow

On-Demand Training - Tessent Integrated Flow

On-Demand Training - Tessent Integrated Flow